132Mb SPI NOR Flash  旺宏 MX25L3255E SOP8

• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
• 33,554,432 x 1 bit structure or 16,777,216 x 2 bits (two I/O mode) structure or 8,388,608 x 4 bits (four I/Omode) structure
• 1024 Equal Sectors with 4K bytes each
- Any Sector can be erased individually

• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
• 33,554,432 x 1 bit structure or 16,777,216 x 2 bits (two I/O mode) structure or 8,388,608 x 4 bits (four I/Omode) structure
• 1024 Equal Sectors with 4K bytes each
- Any Sector can be erased individually
• 128 Equal Blocks with 32K bytes each
- Any Block can be erased individually
• 64 Equal Blocks with 64K bytes each
- Any Block can be erased individually
• Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
• High Performance
VCC = 2.7~3.6V
- Normal read
- 50MHz
- Fast read
- 1 I/O: 104MHz with 8 dummy cycles
- 2 I/O: 86MHz with 4 dummy cycles for 2READ instruction
- 4 I/O: Up to 104MHz for 4READ instruction
- Configurable dummy cycle number for 4READ operation
- Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page)
- Byte program time: 12us (typical)
- Continuous Program mode (automatically increase address under word program mode)
- Fast erase time: 60ms (typ.)/sector (4K-byte per sector) ; 0.7s(typ.) /block (64K-byte per block); 25s(typ.) /
• Low Power Consumption
- Low active read current: 19mA(max.) at 104MHz, 10mA(max.) at 33MHz
- Low active programming current: 25mA (max.)
- Low active erase current: 25mA (max.)
- Low standby current: 80uA (max.)
- Deep power down current: 40uA (max.)
• Typical 100,000 erase/program cycles
• 20 years data retention
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- BP0-BP3 block group protect
- Flexible individual block protect when OTP WPSEL=1
- Additional 4K bits secured OTP for unique identifier
- Permanent Lock
- Read Protection function
• Auto Erase and Auto Program Algorithms
- Automatically erases and verifies data at selected sector
- Automatically programs and verifies data at selected page by an internal algorithm that automatically times
the program pulse width (Any page to be programmed should have page in the erased state first.)
• Status Register Feature
• Electronic Identification
- JEDEC 1-byte Manufacturer ID and 2-byte Device ID
- RES command for 1-byte Device ID
- The REMS,REMS2, REMS4 commands for 1-byte Manufacturer ID and 1-byte Device ID
• Support Serial Flash Discoverable Parameters (SFDP) mode
• SCLK Input
- Serial clock input
- Serial Data Input or Serial Data Input/Output for 2 x I/O mode and 4 x I/O mode
- Serial Data Output or Serial Data Input/Output for 2 x I/O mode and 4 x I/O mode
• WP#/SIO2
- Hardware write protection or serial data Input/Output for 4 x I/O mode
- To pause the device without deselecting the device or serial data Input/Output for 4 x I/O mode
- 8-pin SOP (200mil)
- 24-ball TFBGA (6x8mm)
- All devices are RoHS Compliant